1. Field of the Invention
The invention relates in general to a power-on screen pattern correcting apparatus, and more particularly to a power-on screen pattern correcting apparatus which can adjust a power-on screen pattern of a display to be substantially uniform.
2. Description of the Related Art
Referring to FIG. 1, a circuit diagram of a latch of a source driver in a conventional display is shown. A latch 100 receives a piece of input data In, latches phase-inverted data of the input data In at a node P via timing signals C1 and C1B, and accordingly generates output data Out. When the display is powered on and display data has not yet been transmitted to the display, the data latched at each latch 100 of the source driver may vary randomly to form random data due to non-ideal factors of the circuit. As a result, the power-on screen pattern of the display becomes a random pattern.
Conventionally, in order to solve the above issue that the power-on screen pattern of the display becomes a random pattern, an extra NAND gate 102 is disposed in the latch 100 to receive a power start signal R1, and by using the feature that the timing of the rising edge of the power start signal R1 is delayed by a fixed time compared to the time point when a power signal of the source driver rises up to a high signal level, each latch 100 of the source driver is set to have a high signal level at the node P and their output signals Out have a low signal level when the display is powered on.
However, the conventional improved circuit requires a huge number of extra NAND gates disposed in the source driver in order to solve the issue that the power-on screen pattern of the display becomes a random pattern. For example, a 384-channel source driver with each channel receiving 6 bits of red, green and blue (RGB) pixel data requires 384×6=2304 extra NAND gates. As a result, the area and cost of source driver is greatly increased owing that the latch 100a requires a lot of extra NAND gates.